29 days ago
Heterogeneous Communications Researcher
Research on Heterogeneous Communication Processor Technology.
The design level and computing power requirements of communication processors have reached the highest level in the Intel Xeon-D/SP industry. How to optimize and implement developed CPU cores in the datacom benchmark for complex datacom service scenarios.
1. General CPU: Optimal software ISA/uArch solution for datacom services.
2. Hardware acceleration: Heterogeneous computing innovation, software-hardware synergy, and clustering.
3. SoC architecture: global organization of hundreds of heterogeneous computing nodes.
4. Modeling and simulation: global service definition, abstraction and theory.
BUSINESS VALUE OF THE SUBJECT:
Maintain the cutting-edge development direction and research of key technologies in the datacom processor field, improve the performance of contemporary and next-generation communication processors from multiple dimensions, such as software, hardware, SoC and improve the core competitiveness of datacom products.
CPU ISA/uArch, accelerator, SoC architecture and simulation modeling.
1. Evaluate the functions and performance of each network device application, and research the high-performance solutions of existing chips for applications.
2. Be responsible for innovative research on new accelerators or explore high performance improvement solutions for existing accelerators.
3. Deeply understand the acceleration requirements of network device applications and research new processor/accelerator cluster architecture.
1. Have a basic command of the software and hardware architecture, functions, and performance of common network devices, including but not limited to switching and routing devices.
2. Have a basic command of the instruction set and microarchitecture of chips (including but not limited to x86 and ARM).
3. Familiar with network protocols and applications and be able to design and implement new network protocols and applications.
4. Have basic knowledge of chip architecture and hardware acceleration, including but not limited to CPU/MPSoC, FPGA, and network forwarding chips.
5. Good English reading skills.