£40.00 - £50.00 per hour
9 months ago
Duration: 6 Months
Rate: £40 - £50 per hour
Your main tasks and responsibilities will include:
- Decomposition of requirements into an architecture design and document the chosen design whilst describing any trade-offs performed.
- Detailed RTL design in VHDL.
- Verification of the RTL design and documenting the verification that was performed.
- Gate level implementation of the design including synthesis, placement and static timing analysis.
- Support integration of the FPGA into the target hardware.
- Ensure that all FPGA designs are developed in accordance with the company design process.
We are looking for candidates with the following skills and ability:
- Proven ability in the complete design flow from requirements to design acceptance.
- Proven ability in FPGA technologies and their tools including Xilinx ISE and Microsemi Libero.
- Proven ability in VHDL simulation tools in particular Mentor Graphics Questa.
- Good analytical skills and methodical approach to problem resolution and investigations.
- Good communication skills and able to thrive in a team environment.
- Ability to present technical data in a clear and concise manner.
- Knowledge of the Linux operating system would be beneficial.
- Knowledge of scripting languages including TCL would be beneficial.
Due to the sensitive nature of the product all applicants must have worked within the Defence / Military industry within the last 12 months or be capable of obtaining Security Clearance (SC level minimum).